Low-power logic circuit and SRAM cell applications with silicon on depletion Layer CMOS (SODEL CMOS) technology

• Published in: IEEE journal of solid-state circuits 2006-06, Vol.41 (6), p.1455-1462
• Main Authors: Inaba, S., Nagano, H., Miyano, K., Mizushima, I., Okayama, Y., Nakauchi, T., Ishimaru, K., Ishiuchi, H.
• Format: Article
• Language: English
• Subjects: Applied sciences; Body effect; Capacitance; Circuit properties; Circuits; CMOS; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Delay; Depletion; Design. Technologies. Operation analysis. Testing; Devices; Digital circuits; Electric, optical and optoelectronic circuits; Electronic circuits; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; epitaxial growth; Exact sciences and technology; Integrated circuits; Integrated circuits by function (including memories and processors); Inverters; Logic circuits; MOS devices; Parasitic capacitance; Propagation delay; Random access memory; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; semiconductor junctions; Silicon; silicon on insulator technology; SPICE; SRAM chips; Static random access memory; System-on-a-chip
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2006.874335

In this paper, the switching performance of Silicon on Depletion Layer CMOS (SODEL CMOS) is investigated with a view to realizing high-speed and low-power CMOS applications. Thanks to smaller parasitic capacitance, the propagation delay time (/spl tau//sub pd/) in SODEL CMOS has been improved by up to 25% compared to that of conventional bulk CMOS in five stacked nFET inverters at the same V/sub dd/. It is also confirmed that about 30% better power-delay product can be realized at the same /spl tau//sub pd/ with reduced V/sub dd/ in SODEL CMOS. In SRAM cell applications, SODEL CMOS shows high Static Noise Margin (SNM) of /spl sim/95 mV at V/sub dd/=0.6 V. Smaller bitline delay is expected and confirmed in SODEL CMOS SRAM by SPICE simulations. Latch-up immunity for /spl alpha/-particle irradiation in SODEL CMOS was also found to be comparable to that of conventional bulk CMOS. Therefore, SODEL CMOS device and circuit technology is expected to provide a better solution for low-power system-on-a-chip (SoC).