Characteristics and physical mechanisms of positive bias and temperature stress-induced drain current degradation in HfSiON nMOSFETs

Drain current degradation in HfSiON gate dielectric nMOSFETs by positive gate bias and temperature stress is investigated by using a fast transient measurement technique. The degradation exhibits two stages, featuring a different degradation rate and stress temperature dependence. The first-stage de...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2006-06, Vol.53 (6), p.1340-1346
Main Authors: Chien-Tai Chan, Chun-Jung Tang, Tahui Wang, Wang, H.C.-H., Tang, D.D.
Format: Article
Language:English
Subjects:
Applied sciences
Bias
Charging
Degradation
Dielectric materials
Dielectrics
Drains
Electronics
Exact sciences and technology
Gates
Hafnium compounds
HfSiON
MOSFETs
Permittivity
positive bias temperature instability (PBTI)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductor growth
Silicon compounds
Stresses
Temperature dependence
transient measurement
Transistors
trap generation
two-stage degradation
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Summary:Drain current degradation in HfSiON gate dielectric nMOSFETs by positive gate bias and temperature stress is investigated by using a fast transient measurement technique. The degradation exhibits two stages, featuring a different degradation rate and stress temperature dependence. The first-stage degradation is attributed to the charging of preexisting high-k dielectric traps and has a log(t) dependence on stress time, whereas the second-stage degradation is mainly caused by new high-k trap creation. The high-k trap growth rate is characterized by two techniques, namely 1) a recovery transient technique and 2) a charge-pumping technique. Finally, the effect of processing on high-k trap growth is evaluated.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2006.874160