Automatic Insertion of Low Power Annotations in RTL for Pipelined Microprocessors

We propose instruction-driven slicing, a technique for annotating microprocessor descriptions at the register transfer level (RTL) in order to achieve lower power dissipation. Our technique automatically annotates existing RTL code to optimize the circuit for lowering power dissipated by switching a...

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Bibliographic Details
Main Authors: Viswanath, V., Abraham, H.A., Hunt, W.A.
Format: Conference Proceeding
Language:English
Subjects:
Clocks
Computer aided instruction
Jacobian matrices
Microprocessors
Power dissipation
Power engineering and energy
Power engineering computing
Registers
Switching circuits
Turning
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Description
Summary:We propose instruction-driven slicing, a technique for annotating microprocessor descriptions at the register transfer level (RTL) in order to achieve lower power dissipation. Our technique automatically annotates existing RTL code to optimize the circuit for lowering power dissipated by switching activity. Our technique can be applied at the architectural level as well, achieving similar power gains. We demonstrate our technique on architectural and RTL models of a 32-bit OpenRISC processor (OR1200), showing power gains for the SPEC2000 benchmarks
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2006.243858