Test Generation Algorithms for Computer Hardware Description Languages

This paper proposes an extension of the D-algorithm to functions described in computer hardware description languages. The proposed extension is applicable to both procedural and nonprocedural languages. Methods of D-propagation through the basic constructs of these languages and test generation for...

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Bibliographic Details
Published in:IEEE transactions on computers 1982-07, Vol.C-31 (7), p.577-588
Main Authors: Levendel, Menon
Format: Article
Language:English
Subjects:
D-algorithm
functional blocks
nonprocedural CHDL
procedural CHDL
test generation
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Summary:This paper proposes an extension of the D-algorithm to functions described in computer hardware description languages. The proposed extension is applicable to both procedural and nonprocedural languages. Methods of D-propagation through the basic constructs of these languages and test generation for circuits containing functions described in CHDL's are discussed. The fault modes considered are function variables stuck at 0 or 1, control faults, and function faults with user-specified faulty behaviors.
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.1982.1676054