A parallel search algorithm for CLNS addition optimization

We present analytical formulas for the calculation of the memory requirements for a system using the complex logarithmic number system (CLNS). Certain properties of the CLNS addition algorithm allow replacement of a large memory by smaller multiple memories and combinational circuitry. The multiple...

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Bibliographic Details
Main Authors: Vouzis, P.D., Arnold, M.G.
Format: Conference Proceeding
Language:English
Subjects:
Circuits
Computer science
Costs
Fast Fourier transforms
Hardware
Logic
Quantization
Read only memory
Signal to noise ratio
Table lookup
Online Access:Request full text
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Summary:We present analytical formulas for the calculation of the memory requirements for a system using the complex logarithmic number system (CLNS). Certain properties of the CLNS addition algorithm allow replacement of a large memory by smaller multiple memories and combinational circuitry. The multiple memories combined with a parallel search algorithm offer memory savings up to 90% at the cost of extra hardware. However, depending on the particular case, there is a tradeoff between memory and combinational logic used
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2006.1693110