A character size optimization technique for throughput enhancement of character projection lithography

We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of...

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Bibliographic Details
Main Authors: Sugihara, M., Takata, T., Nakamura, K., Inanami, Rx, Inanami, R., Hayashi, H., Kishimoto, K., Hasebe, T., Kawano, Y., Matsunaga, Y., Murakami, K., Okumura, K.
Format: Conference Proceeding
Language:English
Subjects:
Apertures
Circuits
Electron beams
Fabrication
Lithography
Manufacturing
Production
Semiconductor devices
Shape
Throughput
Online Access:Request full text
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Summary:We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of drastically reducing them by optimizing the size of characters, which are the patterns to project and are placed on CP masks. Experimental results show that our technique reduced 72.0% of EB shots in the best case, comparing with the ad hoc character sizing
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2006.1693146