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A character size optimization technique for throughput enhancement of character projection lithography
We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of...
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| Format: | Conference Proceeding |
| Language: | English |
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| container_end_page | 2564 |
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| container_start_page | 4 pp. |
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| creator | Sugihara, M. Takata, T. Nakamura, K. Inanami, Rx Inanami, R. Hayashi, H. Kishimoto, K. Hasebe, T. Kawano, Y. Matsunaga, Y. Murakami, K. Okumura, K. |
| description | We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of drastically reducing them by optimizing the size of characters, which are the patterns to project and are placed on CP masks. Experimental results show that our technique reduced 72.0% of EB shots in the best case, comparing with the ad hoc character sizing |
| doi_str_mv | 10.1109/ISCAS.2006.1693146 |
| format | conference_proceeding |
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The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of drastically reducing them by optimizing the size of characters, which are the patterns to project and are placed on CP masks. Experimental results show that our technique reduced 72.0% of EB shots in the best case, comparing with the ad hoc character sizing</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2006.1693146</doi></addata></record> |
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| identifier | ISSN: 0271-4302 |
| ispartof | 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 2006, p.4 pp.-2564 |
| issn | 0271-4302 2158-1525 |
| language | eng |
| recordid | cdi_ieee_primary_1693146 |
| source | IEEE Xplore All Conference Series |
| subjects | Apertures Circuits Electron beams Fabrication Lithography Manufacturing Production Semiconductor devices Shape Throughput |
| title | A character size optimization technique for throughput enhancement of character projection lithography |
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