SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory

For the multi-gigabit NAND flash memory, SONOS-type FinFET device with p+ gate and high-k blocking dielectric has been integrated both on the cell array and GSL/SSL for the first time. The advantages of the FinFET structure for the NAND flash application have been theoretically and experimentally de...

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Bibliographic Details
Main Authors: Sung, S.-K., Lee, S.-H., Choi, B., Lee, J., Choe, J.-D., Cho, E., Ahn, Y., Choi, D., Lee, C.-H., Kim, D., Lee, Y.-S., Kim, S., Park, D., Ryu, B.-I.
Format: Conference Proceeding
Language:eng ; jpn
Subjects:
Dielectric devices
FinFETs
High K dielectric materials
High-K gate dielectrics
Interference
Manufacturing processes
Nonvolatile memory
Research and development
Semiconductor device manufacture
Voltage control
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Summary:For the multi-gigabit NAND flash memory, SONOS-type FinFET device with p+ gate and high-k blocking dielectric has been integrated both on the cell array and GSL/SSL for the first time. The advantages of the FinFET structure for the NAND flash application have been theoretically and experimentally demonstrated, and the results show that the 85 % improved on-cell current is achievable using FinFET device. The enhanced programming and retention characteristics of FinFET have been also presented, and modeled by the potential changes on fully-depleted body of the sub-40 nm ultra-narrow fin
ISSN:0743-1562
DOI:10.1109/VLSIT.2006.1705229