Integration of Self-Formed Barrier Technology for 32nm-Node Cu Dual-Damascene Interconnects with Hybrid Low-k (PAr/SiOC) Structure

Self-formed MnO x barrier technology has been successfully integrated for 150nm pitch Cu dual-damascene interconnects with PAr/SiOC (k=2.65) hybrid structure. Barrier formation at the interface of Cu and various low-k films with few Si or O was confirmed by adhesion, XPS and TEM/EDX analyses. No deg...

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Bibliographic Details
Main Authors: Ohoka, Y., Inoue, K., Hayashi, T., Komai, N., Arakawa, S., Kanamura, R., Kadomura, S.
Format: Conference Proceeding
Language:English
Subjects:
Adhesives
Annealing
Automatic testing
Degradation
Dielectrics
Electromigration
Peak to average power ratio
Semiconductor films
Silicon
Thermal stresses
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Summary:Self-formed MnO x barrier technology has been successfully integrated for 150nm pitch Cu dual-damascene interconnects with PAr/SiOC (k=2.65) hybrid structure. Barrier formation at the interface of Cu and various low-k films with few Si or O was confirmed by adhesion, XPS and TEM/EDX analyses. No degradation of interconnect performance and excellent electromigration lifetime were verified. It is concluded that this self-formed barrier technology is a promising technique to satisfy the reliability requirement for 32nm-node Cu/low-k interconnects
ISSN:0743-1562
DOI:10.1109/VLSIT.2006.1705243