Novel Stack-SIN Gate Dielectrics for High Performance 30 nm CMOS for 45 nm Node with Uniaxial Strained Silicon

• Main Authors: Ohta, H., Hori, M., Shima, M., Mori, H., Shimamune, Y., Sakuma, T., Hatada, A., Katakami, A., Kim, Y., Kawamura, K., Owada, T., Morioka, H., Watanabe, T., Hayami, Y., Ogura, J., Tamura, N., Kojima, M., Hashimoto, K.
• Format: Conference Proceeding
• Language: English
• Subjects: CMOSFETs; Dielectric breakdown; Dielectric substrates; Germanium silicon alloys; MOSFET circuits; Negative bias temperature instability; Niobium compounds; Nitrogen; Silicon germanium; Titanium compounds
• ISSN: 0743-1562
• DOI: 10.1109/VLSIT.2006.1705274

Aggressively scaled 30nm gate CMOSFETs for 45nm node is reported. We successfully improved a higher drive current with keeping the short channel effect by Σ shaped SiGe-source/drain (Σ SiGe) structure using compressive-stressed liner. In addition, we developed novel stack-SIN gate dielectrics by using bis-tertiarybutylamino-silane (BTBAS)/NH 3 . Novel stack-SIN gate dielectrics show higher immunity to negative bias temperature instability (NBTI) and time-dependent dielectric breakdown (TDDB) lifetime compared with conventional plasma nitrided silicon dioxide. These characteristic are originated from its unique nitrogen profile. The nitrogen concentration is over 22% at the surface of the dielectric and it rapidly decreases to 1% at the interface with a substrate. A high performance 30 nm gate nMOSFET and pMOSFET were demonstrated with a drive currents of 1042 μA/μm and 602 μA/μm at V d = 1 V / Ioff=100 nA/μm, respectively