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Synthesis of Pulsed-Coupled Neural Networks in FPGAs for Real-Time Image Segmentation
This paper describes the implementation of a system based on Pulse Coupled Neural Networks (PCNNs) and Field Programmable Gate Arrays (FPGAs). The PCNN implemented is oriented to the industrial application of segmentation in sequences of images. The work went through several real physical stages of...
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| creator | Vega-Pineda, J. Chacon-Murguia, M.I. Camarillo-Cisneros, R. |
| description | This paper describes the implementation of a system based on Pulse Coupled Neural Networks (PCNNs) and Field Programmable Gate Arrays (FPGAs). The PCNN implemented is oriented to the industrial application of segmentation in sequences of images. The work went through several real physical stages of implementation and optimization to achieve the needed performance. The greatest performance achieved by the digital system was of 250M pixels per second, enough to process a sequence of images in real time. Details of these stages about the neuron implementation with different Altera's FPGAs families are presented. Furthermore, the implementation is compared with previous implemented schemes based on floating point DSP microprocessor. |
| doi_str_mv | 10.1109/IJCNN.2006.246929 |
| format | conference_proceeding |
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| identifier | ISSN: 2161-4393 |
| ispartof | The 2006 IEEE International Joint Conference on Neural Network Proceedings, 2006, p.4051-4055 |
| issn | 2161-4393 2161-4407 |
| language | eng |
| recordid | cdi_ieee_primary_1716657 |
| source | IEEE Xplore All Conference Series |
| subjects | Digital signal processing Digital systems Field programmable gate arrays Image segmentation Microprocessors Network synthesis Neural networks Neurons Pixel Real time systems |
| title | Synthesis of Pulsed-Coupled Neural Networks in FPGAs for Real-Time Image Segmentation |
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