An efficient software-controlled PLL for low-frequency applications

The concept of a software-controlled phase-locked loop (SCPLL) is presented. It is shown that SCPLLs can offer several advantages over pure hardware implementations. An example design of an SCPLL for a power converter controller is presented, and the experimental results are reported. This SCPLL can...

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Bibliographic Details
Published in:IEEE transactions on industrial electronics (1982) 1988-05, Vol.35 (2), p.341-344
Main Authors: El-Amawy, A.A., Mirbod, A.
Format: Article
Language:English
Subjects:
Application software
Applied sciences
Counting circuits
Delay
Electrical engineering. Electrical power engineering
Exact sciences and technology
Frequency conversion
Frequency synchronization
Hardware
Phase frequency detector
Phase locked loops
Power electronics, power supplies
Rectifiers
Voltage-controlled oscillators
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Summary:The concept of a software-controlled phase-locked loop (SCPLL) is presented. It is shown that SCPLLs can offer several advantages over pure hardware implementations. An example design of an SCPLL for a power converter controller is presented, and the experimental results are reported. This SCPLL can efficiently substitute for the conventional hardware PLL used for timing and clock frequency multiplication in the control circuit of a power converter.< >
ISSN:0278-0046
1557-9948
DOI:10.1109/41.192669