A scalable real-time image processing pipeline

To speed up image processing in the field of robot vision and industrial inspection, a pipeline element was made which is able to perform fast cellular logic operations. This Cellular Logic Processing Element (CLPE) is able to process binary images with a speed of 100 ns per pixel. The processing el...

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Bibliographic Details
Main Authors: Jonker, P.P., Komen, E.R.
Format: Conference Proceeding
Language:English
Subjects:
Buildings
CMOS logic circuits
CMOS process
Image processing
Inspection
Logic arrays
Pipelines
Pixel
Robot vision systems
Service robots
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Summary:To speed up image processing in the field of robot vision and industrial inspection, a pipeline element was made which is able to perform fast cellular logic operations. This Cellular Logic Processing Element (CLPE) is able to process binary images with a speed of 100 ns per pixel. The processing element is a CMOS VLSI-device which includes a Writable Logic Array for the storage of sets of 3*3 structuring elements which define the cellular logic operations. This paper describes how such CLPEs can be used for building a pipeline for mixed grey value processing and cellular logic processing.< >
DOI:10.1109/ICPR.1992.202151