Silicon-bipolar ASICs for 2.5 Gbit/s systems-designed and implemented both as full custom circuits and as personalized transistor arrays

Silicon-bipolar ASICs for 2.5 Gbit/s systems were designed and implemented in different ways. A 4:1-multiplexer, a regenerator, and a 1:4-demultiplexer were realized as full custom circuits. In addition, a second regenerator was implemented using a transistor array. The first measurement results are...

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Bibliographic Details
Main Authors: Bambach, W., Derksen, R.H., Luck, V., Salvasohn, M., Wernz, H.
Format: Conference Proceeding
Language:English
Subjects:
Application specific integrated circuits
Bit rate
Circuit simulation
Costs
Data communication
High speed optical techniques
Multiplexing
Repeaters
Temperature distribution
Voltage
Online Access:Request full text
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Summary:Silicon-bipolar ASICs for 2.5 Gbit/s systems were designed and implemented in different ways. A 4:1-multiplexer, a regenerator, and a 1:4-demultiplexer were realized as full custom circuits. In addition, a second regenerator was implemented using a transistor array. The first measurement results are quite satisfactory. All circuits work up to about 3 Gbit/s and the regenerators have an excellent retiming capability. The measured results agree well with the simulated values.< >
DOI:10.1109/EASIC.1990.207918