Profile leverage in self-aligned epitaxial Si or SiGe base bipolar technology

The authors have developed a planar, self-aligned, epitaxial Si or SiGe-base bipolar technology and explored intrinsic profile design leverage for high-performance devices in three distinct areas: transit time reduction, collector-base (CB) junction engineering, and emitter-base (EB) junction engine...

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Main Authors: Comfort, J.H., Patton, G.L., Cressler, J.D., Lee, W., Crabbe, E.F., Meyerson, B.S., Sun, J.Y.-C., Stork, J.M.C., Lu, P.-F., Burghartz, J.N., Warnock, J., Scilla, G., Toh, K.-Y., D'Agostino, M., Stanis, C., Jenkins, K.
Format: Conference Proceeding
Language:English
Subjects:
Circuit optimization
Coupling circuits
Design engineering
Doping profiles
Germanium silicon alloys
Isolation technology
Logic circuits
Logic devices
Resistors
Silicon germanium
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Summary:The authors have developed a planar, self-aligned, epitaxial Si or SiGe-base bipolar technology and explored intrinsic profile design leverage for high-performance devices in three distinct areas: transit time reduction, collector-base (CB) junction engineering, and emitter-base (EB) junction engineering. High f/sub T/ Si (30-50 GHz) and SiGe (50-70 GHz) epi-base devices were integrated with trench isolation and polysilicon load resistors to evaluate ECL (emitter coupled logic) circuit performance. A 15% enhancement in ECL circuit performance was observed for SiGe relative to Si devices with similar base doping profiles in a given device layout. Minimum SiGe-base ECL gate delays of 24.6 ps (8 mW) were obtained. Lightly doped spacers were positioned in both the EB and CB junctions to tailor junction characteristics (leakage, tunneling, and avalanche breakdown), reduce junction capacitances, and thereby obtain an overall performance improvement.< >
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1990.237235