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A sliding memory plane array processor

A mesh-connected single-input multiple-data (SIMD) architecture called a sliding memory plane (SliM) array processor is proposed. Differing from existing mesh-connected SIMD architectures, SliM has several salient features such as a sliding memory plane that provides inter-PE communication during co...

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Bibliographic Details
Published in:IEEE transactions on parallel and distributed systems 1993-06, Vol.4 (6), p.601-612
Main Authors: Sunwoo, M.H., Aggarwal, J.K.
Format: Article
Language:English
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Summary:A mesh-connected single-input multiple-data (SIMD) architecture called a sliding memory plane (SliM) array processor is proposed. Differing from existing mesh-connected SIMD architectures, SliM has several salient features such as a sliding memory plane that provides inter-PE communication during computation. Two I/O planes provide an I/O overlapping capability. Thus, inter-PE communication and I/O overhead can be overlapped with computation. Inter-PE communication time is invisible in most image processing tasks because the computation time is larger than the communication time on SliM. The ability to overlap inter-PE communication with computation, regardless of window size and shape and without using a coprocessor or an on-chip DMA controller is unique to SliM.< >
ISSN:1045-9219
1558-2183
DOI:10.1109/71.242162