Testing ADC's at sample rates from 20 to 120 MSPS

Results are presented from an ongoing program to test the performance of high-speed analog-to-digital converters suitable for use at the Superconducting Super Collider (SSC) and Large Hadron Collider (LHC). For each device a large number of parameters is measured, such as number of effective bits, n...

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Bibliographic Details
Published in:IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) 1993-08, Vol.40 (4), p.729-732
Main Authors: Crawley, H.B., McKay, R., Meyer, W.T., Rosenberg, E.I., Thomas, W.D.
Format: Article
Language:English
Subjects:
430303 - Particle Accelerators- Experimental Facilities & Equipment
440104 - Radiation Instrumentation- High Energy Physics Instrumentation
Analog-digital conversion
ANALOG-TO-DIGITAL CONVERTERS
Apertures
Applied sciences
Bandwidth
CAMAC SYSTEM
Circuit properties
DATA ACQUISITION SYSTEMS
Distortion measurement
Electric, optical and optoelectronic circuits
Electronic circuits
ELECTRONIC EQUIPMENT
Electronics
Exact sciences and technology
INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
Jitter
Large Hadron Collider
MEASURING INSTRUMENTS
NOISE
Noise level
Noise measurement
PARTICLE ACCELERATORS
RADIATION DETECTORS
READOUT SYSTEMS
Signal convertors
STORAGE RINGS
Superconducting device noise
SUPERCONDUCTING SUPER COLLIDER
Testing
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Summary:Results are presented from an ongoing program to test the performance of high-speed analog-to-digital converters suitable for use at the Superconducting Super Collider (SSC) and Large Hadron Collider (LHC). For each device a large number of parameters is measured, such as number of effective bits, noise level, aperture jitter, nonlinearity, analog bandwidth, and total harmonic distortion. Results from a variety of 8-b and 10-b devices are presented.< >
ISSN:0018-9499
1558-1578
DOI:10.1109/23.256650