Power constraint scheduling of tests

This paper presents motivation for considering the power constraint in testing and gives a model-based formulation of the new test scheduling problem. Optimum test scheduling algorithms are presented for both equal and unequal test length cases under the power constraint. The algorithms consist of t...

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Bibliographic Details
Main Authors: Chou, R.M., Saluja, K.K., Agrawal, V.D.
Format: Conference Proceeding
Language:English
Subjects:
Circuit testing
Digital integrated circuits
Energy consumption
Integrated circuit testing
Optimal scheduling
Performance evaluation
Power dissipation
Resource management
Scheduling algorithm
System testing
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Summary:This paper presents motivation for considering the power constraint in testing and gives a model-based formulation of the new test scheduling problem. Optimum test scheduling algorithms are presented for both equal and unequal test length cases under the power constraint. The algorithms consist of three basic steps. First, we find a complete set of time compatible tests with power dissipation information associated with each test. Second, from these tests, we extract the lists of power compatible tests. And finally, we use a minimum cover table approach to find the optimal scheduling of the tests.< >
ISSN:1063-9667
2380-6923
DOI:10.1109/ICVD.1994.282700