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Comparison of ESD protection capability of SOI and bulk CMOS output buffers
ESD protection capability of SOI CMOS output buffers has been studied with human body model (HBM) stresses of both positive and negative polarity. Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure...
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creator | Chan, Mansun Yuen, S.S. Zhi-Jian Ma Hui, K.Y. Ko, P.K. Chenming Hu |
description | ESD protection capability of SOI CMOS output buffers has been studied with human body model (HBM) stresses of both positive and negative polarity. Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure voltages are limited by positive polarity stresses, SOI circuits display a more serious reliability problem in handling negative ESD discharge current. Bulk NMOS output buffers fabricated on the substrate of the same SOI wafers, after etching away the buried oxide, have been used to compare the ESD protection capability between bulk and SOI technologies. The ESD voltage sustained by these "bulk" NMOS buffers is about twice the voltage sustained by conventional SOI NMOS buffers. This scheme is proposed as an alternative ESD protection for SOI circuits. The effectiveness of ESD resistant design strategies developed in bulk-substrate technologies when transferred to SOI circuits is also discussed in this paper.< > |
doi_str_mv | 10.1109/RELPHY.1994.307821 |
format | conference_proceeding |
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Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure voltages are limited by positive polarity stresses, SOI circuits display a more serious reliability problem in handling negative ESD discharge current. Bulk NMOS output buffers fabricated on the substrate of the same SOI wafers, after etching away the buried oxide, have been used to compare the ESD protection capability between bulk and SOI technologies. The ESD voltage sustained by these "bulk" NMOS buffers is about twice the voltage sustained by conventional SOI NMOS buffers. This scheme is proposed as an alternative ESD protection for SOI circuits. The effectiveness of ESD resistant design strategies developed in bulk-substrate technologies when transferred to SOI circuits is also discussed in this paper.< ></description><identifier>ISBN: 0780313577</identifier><identifier>ISBN: 9780780313576</identifier><identifier>DOI: 10.1109/RELPHY.1994.307821</identifier><language>eng</language><publisher>IEEE</publisher><subject>Biological system modeling ; CMOS technology ; Electrostatic discharge ; Humans ; MOS devices ; MOSFET circuits ; Protection ; Semiconductor device modeling ; Stress ; Voltage</subject><ispartof>Proceedings of 1994 IEEE International Reliability Physics Symposium, 1994, p.292-298</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/307821$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,4035,4036,27904,54899</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/307821$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chan, Mansun</creatorcontrib><creatorcontrib>Yuen, S.S.</creatorcontrib><creatorcontrib>Zhi-Jian Ma</creatorcontrib><creatorcontrib>Hui, K.Y.</creatorcontrib><creatorcontrib>Ko, P.K.</creatorcontrib><creatorcontrib>Chenming Hu</creatorcontrib><title>Comparison of ESD protection capability of SOI and bulk CMOS output buffers</title><title>Proceedings of 1994 IEEE International Reliability Physics Symposium</title><addtitle>RELPHY</addtitle><description>ESD protection capability of SOI CMOS output buffers has been studied with human body model (HBM) stresses of both positive and negative polarity. Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure voltages are limited by positive polarity stresses, SOI circuits display a more serious reliability problem in handling negative ESD discharge current. Bulk NMOS output buffers fabricated on the substrate of the same SOI wafers, after etching away the buried oxide, have been used to compare the ESD protection capability between bulk and SOI technologies. The ESD voltage sustained by these "bulk" NMOS buffers is about twice the voltage sustained by conventional SOI NMOS buffers. This scheme is proposed as an alternative ESD protection for SOI circuits. The effectiveness of ESD resistant design strategies developed in bulk-substrate technologies when transferred to SOI circuits is also discussed in this paper.< ></description><subject>Biological system modeling</subject><subject>CMOS technology</subject><subject>Electrostatic discharge</subject><subject>Humans</subject><subject>MOS devices</subject><subject>MOSFET circuits</subject><subject>Protection</subject><subject>Semiconductor device modeling</subject><subject>Stress</subject><subject>Voltage</subject><isbn>0780313577</isbn><isbn>9780780313576</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1994</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj9FKwzAYhQMiqHMvsKu8QGv-JmmaS6nVDSsVqxdejST9C9FuLW16sbe3Y56bD74DBw4hG2AxANMPH0X5vv2OQWsRc6ayBK7I3ULGgUulbsh6mn7YEiEhVcktec37w2BGP_VH2re0qJ_oMPYBXfCLcWYw1nc-nM5lXe2oOTbUzt0vzd-qmvZzGOawiLbFcbon163pJlz_c0W-novPfBuV1csufywjDyoJUcoBMmazRDLBLQqUIDLJrUpRIjILQrbaGi6kdbpptHRN5pSwxoEySgq-IpvLrkfE_TD6gxlP-8td_gf8j0qt</recordid><startdate>1994</startdate><enddate>1994</enddate><creator>Chan, Mansun</creator><creator>Yuen, S.S.</creator><creator>Zhi-Jian Ma</creator><creator>Hui, K.Y.</creator><creator>Ko, P.K.</creator><creator>Chenming Hu</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1994</creationdate><title>Comparison of ESD protection capability of SOI and bulk CMOS output buffers</title><author>Chan, Mansun ; Yuen, S.S. ; Zhi-Jian Ma ; Hui, K.Y. ; Ko, P.K. ; Chenming Hu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i172t-631180b825043be4e514853b76e5ee0b145f9ba345bc9dd95cd8c74bac17a7543</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Biological system modeling</topic><topic>CMOS technology</topic><topic>Electrostatic discharge</topic><topic>Humans</topic><topic>MOS devices</topic><topic>MOSFET circuits</topic><topic>Protection</topic><topic>Semiconductor device modeling</topic><topic>Stress</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Chan, Mansun</creatorcontrib><creatorcontrib>Yuen, S.S.</creatorcontrib><creatorcontrib>Zhi-Jian Ma</creatorcontrib><creatorcontrib>Hui, K.Y.</creatorcontrib><creatorcontrib>Ko, P.K.</creatorcontrib><creatorcontrib>Chenming Hu</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chan, Mansun</au><au>Yuen, S.S.</au><au>Zhi-Jian Ma</au><au>Hui, K.Y.</au><au>Ko, P.K.</au><au>Chenming Hu</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Comparison of ESD protection capability of SOI and bulk CMOS output buffers</atitle><btitle>Proceedings of 1994 IEEE International Reliability Physics Symposium</btitle><stitle>RELPHY</stitle><date>1994</date><risdate>1994</risdate><spage>292</spage><epage>298</epage><pages>292-298</pages><isbn>0780313577</isbn><isbn>9780780313576</isbn><abstract>ESD protection capability of SOI CMOS output buffers has been studied with human body model (HBM) stresses of both positive and negative polarity. Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure voltages are limited by positive polarity stresses, SOI circuits display a more serious reliability problem in handling negative ESD discharge current. Bulk NMOS output buffers fabricated on the substrate of the same SOI wafers, after etching away the buried oxide, have been used to compare the ESD protection capability between bulk and SOI technologies. The ESD voltage sustained by these "bulk" NMOS buffers is about twice the voltage sustained by conventional SOI NMOS buffers. This scheme is proposed as an alternative ESD protection for SOI circuits. The effectiveness of ESD resistant design strategies developed in bulk-substrate technologies when transferred to SOI circuits is also discussed in this paper.< ></abstract><pub>IEEE</pub><doi>10.1109/RELPHY.1994.307821</doi><tpages>7</tpages></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Biological system modeling CMOS technology Electrostatic discharge Humans MOS devices MOSFET circuits Protection Semiconductor device modeling Stress Voltage |
title | Comparison of ESD protection capability of SOI and bulk CMOS output buffers |
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