Real-time implementation of 16 kb/s low-delay CELP speech coding algorithm on a TMS320C30

The 16 kb/s LD-CELP speech coding algorithm is submitted by AT&T to CCITT for the 16 kb/s speech coding standard which can be used in many applications. After having investigated the algorithm carefully and simulated it in FORTRAN and DSP TMS320C30 assembly language respectively the authors find...

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Bibliographic Details
Main Authors: Hui Guanghui, Tian Wenshun, Ni Weizhen, Wang Dejun
Format: Conference Proceeding
Language:English
Subjects:
Bit error rate
Decoding
Delay
Digital signal processing
Filters
Linear predictive coding
Sampling methods
Speech analysis
Speech coding
Speech synthesis
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Summary:The 16 kb/s LD-CELP speech coding algorithm is submitted by AT&T to CCITT for the 16 kb/s speech coding standard which can be used in many applications. After having investigated the algorithm carefully and simulated it in FORTRAN and DSP TMS320C30 assembly language respectively the authors find that the difficulty implementing the 16 kb/s LD-CELP algorithm on a TMS320C30 is the large computational load and rather uneven distribution among 8 vectors in the same adaptation cycle. Some techniques are used in the program to reduce the computational load and a recursive window is used to compute autocorrelation functions. At last, the authors employ about 90% processor time of a TMS320C30 to implement the 16 kb/s LD-CELP coding algorithm in real-time.< >
DOI:10.1109/TENCON.1993.327977