Highly manufacturable process technology for reliable 256 Mbit and 1 Gbit DRAMs

Ta/sub 2/O/sub 5/ dielectric on poly-Si cylinder capacitors, chemical-mechanical polishing (CMP) planarization, pure W bit-line, and Al reflow were integrated into a highly manufacturable DRAM process technology. This technology provided larger process margin, higher reliability, and better design f...

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Main Authors: Kang, H.K., Kim, K.H., Shin, Y.G., Park, I.S., Ko, K.M., Kim, C.G., Oh, K.Y., Kim, S.E., Hong, C.G., Kwon, K.W., Yoo, J.Y., Kim, Y.G., Lee, C.G., Paick, W.S., Suh, D.I., Park, C.J., Lee, S.I., Ahn, S.T., Hwang, C.G., Lee, M.Y.
Format: Conference Proceeding
Language:English
Subjects:
Capacitors
Chemical technology
Dielectrics
Lithography
Manufacturing processes
Planarization
Random access memory
Research and development
Temperature
Tin
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Summary:Ta/sub 2/O/sub 5/ dielectric on poly-Si cylinder capacitors, chemical-mechanical polishing (CMP) planarization, pure W bit-line, and Al reflow were integrated into a highly manufacturable DRAM process technology. This technology provided larger process margin, higher reliability, and better design flexibility. In addition, the critical steps of the new process has been reduced by 25% of those of the conventional process. The manufacturability of the technology has been proven by applying it to 16 Mbit density DRAMs with 256 Mbit design rule (0.28 /spl mu/m).< >
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1994.383330