Implementation of hardware structures through configurable logic

This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research oppo...

Full description

Saved in:
Bibliographic Details
Main Authors: Knopman, J., Fernandes, E.S.T., Mesquita, A.C.
Format: Conference Proceeding
Language:English
Subjects:
Application software
Computer architecture
Data structures
Field programmable gate arrays
Hardware
Logic arrays
Logic devices
Programmable logic arrays
Programming profession
Read-write memory
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 130
container_issue
container_start_page 125
container_title
container_volume
creator Knopman, J.
Fernandes, E.S.T.
Mesquita, A.C.
description This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research opportunities in the Computer Architecture area. The paper presents the design of an array of programmable devices, the mapping process of basic Architecture Structures onto the array: and the current stage of the project.< >
doi_str_mv 10.1109/EURMIC.1994.390398
format conference_proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_390398</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>390398</ieee_id><sourcerecordid>390398</sourcerecordid><originalsourceid>FETCH-LOGICAL-i89t-f5a440b8c7ab71225192e7d434349ef804e52a67d7b1ff51b3fe07ca2014ce993</originalsourceid><addsrcrecordid>eNotj8tKxDAYRgMiKGNfYFZ5gdbc2uTfKWXUgRFBxvWQpn_aSC9DmiK-vQPjdxZnd-AjZMtZwTmDx93X5_u-LjiAKiQwCeaGZKANM9xUlZJM3ZFsWb7ZZUpJbcQ9edqP5wFHnJJNYZ7o7GlvY_tjI9IlxdWlNeJCUx_nteupmycfujXaZkA6zF1wD-TW22HB7N8bcnzZHeu3_PDxuq-fD3kwkHJfWqVYY5y2jeZClBwE6lbJC4DeMIWlsJVudcO9L3kjPTLtrGBcOQSQG7K9ZgMins4xjDb-nq4v5R8SmEkx</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Implementation of hardware structures through configurable logic</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Knopman, J. ; Fernandes, E.S.T. ; Mesquita, A.C.</creator><creatorcontrib>Knopman, J. ; Fernandes, E.S.T. ; Mesquita, A.C.</creatorcontrib><description>This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research opportunities in the Computer Architecture area. The paper presents the design of an array of programmable devices, the mapping process of basic Architecture Structures onto the array: and the current stage of the project.&lt; &gt;</description><identifier>ISBN: 9780818664304</identifier><identifier>ISBN: 0818664304</identifier><identifier>DOI: 10.1109/EURMIC.1994.390398</identifier><language>eng</language><publisher>IEEE Comput. Soc. Press</publisher><subject>Application software ; Computer architecture ; Data structures ; Field programmable gate arrays ; Hardware ; Logic arrays ; Logic devices ; Programmable logic arrays ; Programming profession ; Read-write memory</subject><ispartof>Proceedings of Twentieth Euromicro Conference. System Architecture and Integration, 1994, p.125-130</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/390398$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/390398$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Knopman, J.</creatorcontrib><creatorcontrib>Fernandes, E.S.T.</creatorcontrib><creatorcontrib>Mesquita, A.C.</creatorcontrib><title>Implementation of hardware structures through configurable logic</title><title>Proceedings of Twentieth Euromicro Conference. System Architecture and Integration</title><addtitle>EURMIC</addtitle><description>This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research opportunities in the Computer Architecture area. The paper presents the design of an array of programmable devices, the mapping process of basic Architecture Structures onto the array: and the current stage of the project.&lt; &gt;</description><subject>Application software</subject><subject>Computer architecture</subject><subject>Data structures</subject><subject>Field programmable gate arrays</subject><subject>Hardware</subject><subject>Logic arrays</subject><subject>Logic devices</subject><subject>Programmable logic arrays</subject><subject>Programming profession</subject><subject>Read-write memory</subject><isbn>9780818664304</isbn><isbn>0818664304</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1994</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj8tKxDAYRgMiKGNfYFZ5gdbc2uTfKWXUgRFBxvWQpn_aSC9DmiK-vQPjdxZnd-AjZMtZwTmDx93X5_u-LjiAKiQwCeaGZKANM9xUlZJM3ZFsWb7ZZUpJbcQ9edqP5wFHnJJNYZ7o7GlvY_tjI9IlxdWlNeJCUx_nteupmycfujXaZkA6zF1wD-TW22HB7N8bcnzZHeu3_PDxuq-fD3kwkHJfWqVYY5y2jeZClBwE6lbJC4DeMIWlsJVudcO9L3kjPTLtrGBcOQSQG7K9ZgMins4xjDb-nq4v5R8SmEkx</recordid><startdate>1994</startdate><enddate>1994</enddate><creator>Knopman, J.</creator><creator>Fernandes, E.S.T.</creator><creator>Mesquita, A.C.</creator><general>IEEE Comput. Soc. Press</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1994</creationdate><title>Implementation of hardware structures through configurable logic</title><author>Knopman, J. ; Fernandes, E.S.T. ; Mesquita, A.C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i89t-f5a440b8c7ab71225192e7d434349ef804e52a67d7b1ff51b3fe07ca2014ce993</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Application software</topic><topic>Computer architecture</topic><topic>Data structures</topic><topic>Field programmable gate arrays</topic><topic>Hardware</topic><topic>Logic arrays</topic><topic>Logic devices</topic><topic>Programmable logic arrays</topic><topic>Programming profession</topic><topic>Read-write memory</topic><toplevel>online_resources</toplevel><creatorcontrib>Knopman, J.</creatorcontrib><creatorcontrib>Fernandes, E.S.T.</creatorcontrib><creatorcontrib>Mesquita, A.C.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Knopman, J.</au><au>Fernandes, E.S.T.</au><au>Mesquita, A.C.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Implementation of hardware structures through configurable logic</atitle><btitle>Proceedings of Twentieth Euromicro Conference. System Architecture and Integration</btitle><stitle>EURMIC</stitle><date>1994</date><risdate>1994</risdate><spage>125</spage><epage>130</epage><pages>125-130</pages><isbn>9780818664304</isbn><isbn>0818664304</isbn><abstract>This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research opportunities in the Computer Architecture area. The paper presents the design of an array of programmable devices, the mapping process of basic Architecture Structures onto the array: and the current stage of the project.&lt; &gt;</abstract><pub>IEEE Comput. Soc. Press</pub><doi>10.1109/EURMIC.1994.390398</doi><tpages>6</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 9780818664304
ispartof Proceedings of Twentieth Euromicro Conference. System Architecture and Integration, 1994, p.125-130
issn
language eng
recordid cdi_ieee_primary_390398
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Application software
Computer architecture
Data structures
Field programmable gate arrays
Hardware
Logic arrays
Logic devices
Programmable logic arrays
Programming profession
Read-write memory
title Implementation of hardware structures through configurable logic
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T00%3A50%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Implementation%20of%20hardware%20structures%20through%20configurable%20logic&rft.btitle=Proceedings%20of%20Twentieth%20Euromicro%20Conference.%20System%20Architecture%20and%20Integration&rft.au=Knopman,%20J.&rft.date=1994&rft.spage=125&rft.epage=130&rft.pages=125-130&rft.isbn=9780818664304&rft.isbn_list=0818664304&rft_id=info:doi/10.1109/EURMIC.1994.390398&rft_dat=%3Cieee_6IE%3E390398%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i89t-f5a440b8c7ab71225192e7d434349ef804e52a67d7b1ff51b3fe07ca2014ce993%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=390398&rfr_iscdi=true