Reduction of Common Mode EMI in a PWM Inverter through Fine-Tuning Gating Signals

In PWM converters, high dv/dts due to fast switching of the power devices can cause serious common mode electromagnetic interference (CM EMI). Theoretically, a single-phase full-bridge inverter under bipolar SPWM operation should produce very low CM noise because the two phase legs operating in a co...

Full description

Saved in:
Bibliographic Details
Main Authors: Kai Zhang, Yunbin Zhou, Zhiyong Liu
Format: Conference Proceeding
Language:English
Subjects:
Capacitors
Delay
Electromagnetic interference
Frequency
Leg
Noise generators
Phase noise
Pulse width modulation inverters
Semiconductor device noise
Voltage
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In PWM converters, high dv/dts due to fast switching of the power devices can cause serious common mode electromagnetic interference (CM EMI). Theoretically, a single-phase full-bridge inverter under bipolar SPWM operation should produce very low CM noise because the two phase legs operating in a complementary manner can compensate for each other. However, in practice this ideal scenario will never happen due to different transmission delays of the gating signals. In this paper, a method to compensate those differences in transmission delays through fine-tuning the pulse edges of gating signals is proposed and examined with experiment. Experiment on a DSP-controlled single-phase full-bridge inverter shows that this method can effectively reduce the CM noise up to 4 MHz without any hardware expense. Limitations of the method are also discussed based on the experimental results
DOI:10.1109/ICIEA.2006.257240