PIFO Output Queued Switch Emulation by a One-cell-Crosspoint Buffered Crossbar Switch

It is well known that the buffered crossbar has simpler scheduling algorithms than an unbuffered crossbar. Buffered crossbar can be pipelined to run at a high speed, making it appealing for high performance switches and routers. Recent researches indicate that a buffered crossbar with modest speedup...

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Bibliographic Details
Main Authors: Han Qiu, YuFeng Li, Peng Yi, JiangXing Wu
Format: Conference Proceeding
Language:English
Subjects:
Buffer storage
Delay
Emulation
Packet switching
Scalability
Scheduling algorithm
Switches
Switching systems
Throughput
Traffic control
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Summary:It is well known that the buffered crossbar has simpler scheduling algorithms than an unbuffered crossbar. Buffered crossbar can be pipelined to run at a high speed, making it appealing for high performance switches and routers. Recent researches indicate that a buffered crossbar with modest speedup can exactly emulate an output queued (OQ) switch. As for per flow/priority guarantee, additional speedup and storage is required to avoid crosspoint blocking, preventing the use of the buffered crossbar for lager-scale devices. This paper introduces a novel mechanism to solve crosspoint blocking and a simple architecture to provide per flow/priority guarantee. Based on a simple scheduling scheme, named modified group-by-first-in-first-out-group-lowest time-to-leave (MGBFG-LTTL), we sufficiently prove that a one-cell-crosspoint buffered crossbar with input virtual priority output queues, VPOQ/CB-1, switch with two times speedup can exactly emulate a push-in-first-out (PIFO) OQ switch. Our scheme has less hardware requirements and provides a simple path to scale crossbar based routers
DOI:10.1109/ICCCAS.2006.285016