Device Technology for embedded DRAM utilizing stacked MIM(Metal-Insulator-Metal) Capacitor

This paper presents embedded DRAM device technology utilizing stacked MIM(metal-insulator-metal) capacitor. Targeted for high random-access performance as well as low-power data-streaming applications, original structure named "full metal DRAM" has been devised and implemented from 150nm g...

Full description

Saved in:
Bibliographic Details
Main Authors: Yamagata, Y., Shirai, H., Sugimura, H., Arai, S., Wake, T., Inoue, K., Sakoh, T., Sakao, M., Tanigawa, T.
Format: Conference Proceeding
Language:English
Subjects:
Capacitors
Random access memory
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper presents embedded DRAM device technology utilizing stacked MIM(metal-insulator-metal) capacitor. Targeted for high random-access performance as well as low-power data-streaming applications, original structure named "full metal DRAM" has been devised and implemented from 150nm generation. This features reduced parasitic resistance of DRAM cell and fully-compatible CMOS Trs. characteristics with that of leading-edge CMOS. In 90nm generation, ZrO 2 is introduced as capacitor dielectric material for cell size reduction. For the next generation of 55nm, high-k gate dielectric(HfSiON) will be introduced in CMOS platform, which can be effectively exploited for embedded DRAM scaling and performance improvement
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2006.320987