Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories

A memory sense-amplifier self-calibrates during sense-line precharge to reduce the required signal development and minimize data capture timing uncertainty caused by random device variation. When compared to conventional single-ended sensing, this method reduces sense time by 70% and decreases sense...

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Bibliographic Details
Main Authors: Arsovski, I., Wistort, R.
Format: Conference Proceeding
Language:English
Subjects:
Automatic testing
CADCAM
Computer aided manufacturing
Energy consumption
Hardware
Power measurement
Robustness
Time measurement
Timing
Uncertainty
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Summary:A memory sense-amplifier self-calibrates during sense-line precharge to reduce the required signal development and minimize data capture timing uncertainty caused by random device variation. When compared to conventional single-ended sensing, this method reduces sense time by 70% and decreases sense-power by 40%. The self-referenced sensing scheme (SRSS) is used to implement the search operation in content-addressable memory (CAM) testchip. Fabricated in 1V 65nm CMOS, this scheme achieves a 0.6ns search time on a 70bit sense-line while consuming only 0.99 fJ/bit/search. Measured search access time on a five bank 64times240bit ternary CAM including selective precharge is 2.2ns. Measured power consumption at 450MHz is 10mW. Hardware shows robust search operation over a voltage range of 0.6V to 1.7V
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2006.320819