A 0.5-V 1-Msps Track-and-Hold Circuit With 60-dB SNDR

We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with s...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2007-04, Vol.42 (4), p.722-729
Main Authors: Chatterjee, S., Kinget, P.R.
Format: Article
Language:English
Subjects:
Analog circuits
Analog integrated circuits
Applied sciences
BiCMOS integrated circuits
body-bias
Boosting
Circuit design
Circuit properties
Circuits
Circuits of signal characteristics conditioning (including delay circuits)
Clocks
CMOS
CMOS process
CMOS technology
Design. Technologies. Operation analysis. Testing
Devices
Electric potential
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Integrated circuits
Low voltage
Nanoscale devices
sample-and-hold
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Switches
Switching circuits
Threshold voltage
track-and-hold
Voltage
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Description
Summary:We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with standard 0.6-V V T devices, and uses true low-voltage design techniques with no clock boosting and no voltage boosting. The T/H circuit has a measured current consumption of 600 muA
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2007.892211