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A 0.5-V 1-Msps Track-and-Hold Circuit With 60-dB SNDR
We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with s...
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| Published in: | IEEE journal of solid-state circuits 2007-04, Vol.42 (4), p.722-729 |
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| Main Authors: | , |
| Format: | Article |
| Language: | English |
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| cited_by | cdi_FETCH-LOGICAL-c449t-877d5ab566ee44e10f8f4c99619eb969e11de33d5f0ccf810c42b873e4a7ec2c3 |
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| cites | cdi_FETCH-LOGICAL-c449t-877d5ab566ee44e10f8f4c99619eb969e11de33d5f0ccf810c42b873e4a7ec2c3 |
| container_end_page | 729 |
| container_issue | 4 |
| container_start_page | 722 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 42 |
| creator | Chatterjee, S. Kinget, P.R. |
| description | We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with standard 0.6-V V T devices, and uses true low-voltage design techniques with no clock boosting and no voltage boosting. The T/H circuit has a measured current consumption of 600 muA |
| doi_str_mv | 10.1109/JSSC.2007.892211 |
| format | article |
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A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with standard 0.6-V V T devices, and uses true low-voltage design techniques with no clock boosting and no voltage boosting. The T/H circuit has a measured current consumption of 600 muA</description><subject>Analog circuits</subject><subject>Analog integrated circuits</subject><subject>Applied sciences</subject><subject>BiCMOS integrated circuits</subject><subject>body-bias</subject><subject>Boosting</subject><subject>Circuit design</subject><subject>Circuit properties</subject><subject>Circuits</subject><subject>Circuits of signal characteristics conditioning (including delay circuits)</subject><subject>Clocks</subject><subject>CMOS</subject><subject>CMOS process</subject><subject>CMOS technology</subject><subject>Design. Technologies. Operation analysis. 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Solid state devices</topic><topic>Switches</topic><topic>Switching circuits</topic><topic>Threshold voltage</topic><topic>track-and-hold</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chatterjee, S.</creatorcontrib><creatorcontrib>Kinget, P.R.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Chatterjee, S.</au><au>Kinget, P.R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 0.5-V 1-Msps Track-and-Hold Circuit With 60-dB SNDR</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2007-04-01</date><risdate>2007</risdate><volume>42</volume><issue>4</issue><spage>722</spage><epage>729</epage><pages>722-729</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>We discuss a design technique that makes possible the operation of track-and-hold (T/H) circuits with very low supply voltages, down to 0.5 V. A 0.5-V 1-Msps T/H circuit with a 60-dB SNDR is presented. The fully differential circuit is fabricated in the CMOS part of a 0.25-mum BiCMOS process, with standard 0.6-V V T devices, and uses true low-voltage design techniques with no clock boosting and no voltage boosting. The T/H circuit has a measured current consumption of 600 muA</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/JSSC.2007.892211</doi><tpages>8</tpages></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2007-04, Vol.42 (4), p.722-729 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_ieee_primary_4140575 |
| source | IEEE Electronic Library (IEL) Journals |
| subjects | Analog circuits Analog integrated circuits Applied sciences BiCMOS integrated circuits body-bias Boosting Circuit design Circuit properties Circuits Circuits of signal characteristics conditioning (including delay circuits) Clocks CMOS CMOS process CMOS technology Design. Technologies. Operation analysis. Testing Devices Electric potential Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Integrated circuits Low voltage Nanoscale devices sample-and-hold Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Switches Switching circuits Threshold voltage track-and-hold Voltage |
| title | A 0.5-V 1-Msps Track-and-Hold Circuit With 60-dB SNDR |
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