A generic method for fault injection in circuits

Microcircuits dedicated to security in smartcards are targeted by more and more sophisticated attacks like fault attacks that combine physical disturbance and cryptanalysis. The use of simulation for circuit validation considering these attacks is limited by the time needed to compute the result of...

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Bibliographic Details
Main Authors: Faurax, O., Freund, L., Tria, A., Muntean, T., Bancel, F.
Format: Conference Proceeding
Language:English
Subjects:
Analytical models
Circuit faults
Circuit simulation
Communication industry
Computational modeling
Latches
Mining industry
Real time systems
Registers
System-on-a-chip
Online Access:Request full text
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Summary:Microcircuits dedicated to security in smartcards are targeted by more and more sophisticated attacks like fault attacks that combine physical disturbance and cryptanalysis. The use of simulation for circuit validation considering these attacks is limited by the time needed to compute the result of the chosen fault injections. Usually, this choice is made by the user according to his knowledge of the circuit functionality. The aim of this paper is to propose a generic and semi-automatic method to reduce the number of fault injections using types of data stored in registers (latch by latch)
DOI:10.1109/IWSOC.2006.348238