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Development and Distribution of TSMC 0.25 \mu m Standard CMOS Library Cells
Cell-based design is a widely adopted design approach in current ASIC and SOC designs. Standard cell libraries are a collection of basic building blocks that can be used in cell-based designs. The use of standard cell libraries offers shorter design time, induces fewer errors in the design process,...
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creator | Djigbenou, J.D. Dong Sam Ha |
description | Cell-based design is a widely adopted design approach in current ASIC and SOC designs. Standard cell libraries are a collection of basic building blocks that can be used in cell-based designs. The use of standard cell libraries offers shorter design time, induces fewer errors in the design process, and is easier to maintain. This paper presents the TSMC 0.25 mum standard CMOS cell library designed and distributed by the Virginia Tech VISI for Telecommunications (VTVT) Group, and its impact on the VISI design community and VLSI education. |
doi_str_mv | 10.1109/MSE.2007.34 |
format | conference_proceeding |
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Standard cell libraries are a collection of basic building blocks that can be used in cell-based designs. The use of standard cell libraries offers shorter design time, induces fewer errors in the design process, and is easier to maintain. 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Standard cell libraries are a collection of basic building blocks that can be used in cell-based designs. The use of standard cell libraries offers shorter design time, induces fewer errors in the design process, and is easier to maintain. This paper presents the TSMC 0.25 mum standard CMOS cell library designed and distributed by the Virginia Tech VISI for Telecommunications (VTVT) Group, and its impact on the VISI design community and VLSI education.</description><subject>Analog-digital conversion</subject><subject>Circuit simulation</subject><subject>Circuit synthesis</subject><subject>Hardware design languages</subject><subject>Libraries</subject><subject>Logic design</subject><subject>Multiplexing</subject><subject>Standards development</subject><subject>Telecommunication standards</subject><subject>Very large scale integration</subject><isbn>076952849X</isbn><isbn>9780769528496</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotjk9LwzAYhwMiTOdOHr3kC7S-75ukMUfpphNbdugGHoSRrAlE-me0neC3t6C_y3N5ePgxdo-QIoJ5LKtNSgA6FfKK3YLOjKInaT4WbDWOXzBPGCUzecPe1_7bN_259d3EbVfzdRynIbrLFPuO94HvqzLnkJLin-2Ft7yaZssONc_LXcWL6AY7_PDcN814x66DbUa_-ueSHV42-3ybFLvXt_y5SCJqNSWKQAXrdLDBoA7CkAcHKD2dtLa1h5oQpTpZB2TQCFM7q0JGhpzKCEEs2cNfN3rvj-chtvOFoySBUgjxC_NLR-M</recordid><startdate>200706</startdate><enddate>200706</enddate><creator>Djigbenou, J.D.</creator><creator>Dong Sam Ha</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200706</creationdate><title>Development and Distribution of TSMC 0.25 \mu m Standard CMOS Library Cells</title><author>Djigbenou, J.D. ; Dong Sam Ha</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-5205fab7faf917f392e0b014e2c77ade0d21145cab0291939dba5f6292b562103</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Analog-digital conversion</topic><topic>Circuit simulation</topic><topic>Circuit synthesis</topic><topic>Hardware design languages</topic><topic>Libraries</topic><topic>Logic design</topic><topic>Multiplexing</topic><topic>Standards development</topic><topic>Telecommunication standards</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Djigbenou, J.D.</creatorcontrib><creatorcontrib>Dong Sam Ha</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Djigbenou, J.D.</au><au>Dong Sam Ha</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Development and Distribution of TSMC 0.25 \mu m Standard CMOS Library Cells</atitle><btitle>2007 IEEE International Conference on Microelectronic Systems Education (MSE'07)</btitle><stitle>MSE</stitle><date>2007-06</date><risdate>2007</risdate><spage>27</spage><epage>28</epage><pages>27-28</pages><isbn>076952849X</isbn><isbn>9780769528496</isbn><abstract>Cell-based design is a widely adopted design approach in current ASIC and SOC designs. Standard cell libraries are a collection of basic building blocks that can be used in cell-based designs. The use of standard cell libraries offers shorter design time, induces fewer errors in the design process, and is easier to maintain. This paper presents the TSMC 0.25 mum standard CMOS cell library designed and distributed by the Virginia Tech VISI for Telecommunications (VTVT) Group, and its impact on the VISI design community and VLSI education.</abstract><pub>IEEE</pub><doi>10.1109/MSE.2007.34</doi><tpages>2</tpages></addata></record> |
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ispartof | 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07), 2007, p.27-28 |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Analog-digital conversion Circuit simulation Circuit synthesis Hardware design languages Libraries Logic design Multiplexing Standards development Telecommunication standards Very large scale integration |
title | Development and Distribution of TSMC 0.25 \mu m Standard CMOS Library Cells |
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