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Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip
This paper proposes an approach to accelerate elliptic curve cryptography (ECC) algorithm on system-on-programmable-chip (SOPC). We firstly analyzed the software efficiency of field multiplication and field division over GF(2 m ) on Nios II processor. Hardware acceleration for both field multiplicat...
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creator | Jian-Yang Zhou Xiao-Gang Jiang |
description | This paper proposes an approach to accelerate elliptic curve cryptography (ECC) algorithm on system-on-programmable-chip (SOPC). We firstly analyzed the software efficiency of field multiplication and field division over GF(2 m ) on Nios II processor. Hardware acceleration for both field multiplication and division is investigated. The designs are integrated and verified with Nios II processor. The experimental results showed that accelerators improve the performance of ECC considerably with the cost of more areas. |
doi_str_mv | 10.1109/IWASID.2007.373747 |
format | conference_proceeding |
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We firstly analyzed the software efficiency of field multiplication and field division over GF(2 m ) on Nios II processor. Hardware acceleration for both field multiplication and division is investigated. The designs are integrated and verified with Nios II processor. The experimental results showed that accelerators improve the performance of ECC considerably with the cost of more areas.</description><identifier>ISSN: 2163-5048</identifier><identifier>EISBN: 1424410355</identifier><identifier>EISBN: 9781424410354</identifier><identifier>DOI: 10.1109/IWASID.2007.373747</identifier><language>eng</language><publisher>IEEE</publisher><subject>Acceleration ; Arithmetic ; Costs ; Digital signatures ; Elliptic curve cryptography ; Elliptic curves ; Galois fields ; Hardware ; Public key cryptography ; Security</subject><ispartof>2007 International Workshop on Anti-Counterfeiting, Security and Identification (ASID), 2007, p.292-295</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4244833$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,23930,23931,25140,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4244833$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Jian-Yang Zhou</creatorcontrib><creatorcontrib>Xiao-Gang Jiang</creatorcontrib><title>Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip</title><title>2007 International Workshop on Anti-Counterfeiting, Security and Identification (ASID)</title><addtitle>IWASID</addtitle><description>This paper proposes an approach to accelerate elliptic curve cryptography (ECC) algorithm on system-on-programmable-chip (SOPC). We firstly analyzed the software efficiency of field multiplication and field division over GF(2 m ) on Nios II processor. Hardware acceleration for both field multiplication and division is investigated. The designs are integrated and verified with Nios II processor. The experimental results showed that accelerators improve the performance of ECC considerably with the cost of more areas.</description><subject>Acceleration</subject><subject>Arithmetic</subject><subject>Costs</subject><subject>Digital signatures</subject><subject>Elliptic curve cryptography</subject><subject>Elliptic curves</subject><subject>Galois fields</subject><subject>Hardware</subject><subject>Public key cryptography</subject><subject>Security</subject><issn>2163-5048</issn><isbn>1424410355</isbn><isbn>9781424410354</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj9FKwzAUQCMoOOd-QF_6A5k3vUmTPJY6Z2GgMMXHkdSbLdJuJa1C_16GPh04DwcOY3cClkKAfag_ym39uMwB9BI1aqkv2I2QuZQCUKlLNstFgVyBNNdsMQxfACBAWyvMjK3LpqGWkhvjcZ-t2jb2Y2yy6jv9UFalqR9P--T6w5Sdjtl2Gkbq-OnIX9NZd53zLfHqEPtbdhVcO9Din3P2_rR6q5755mVdV-WGR6HVyEmGhpwslFNa5MZowM88hOAJg1DGe4NWGpeDR7LaB28NGOPJFDZAgYBzdv_XjUS061PsXJp251mDiL_baky0</recordid><startdate>200704</startdate><enddate>200704</enddate><creator>Jian-Yang Zhou</creator><creator>Xiao-Gang Jiang</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200704</creationdate><title>Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip</title><author>Jian-Yang Zhou ; Xiao-Gang Jiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-e4fcea465a571288703d2fffbe3f158bb83948a20b3e97bfb98088be869f06303</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Acceleration</topic><topic>Arithmetic</topic><topic>Costs</topic><topic>Digital signatures</topic><topic>Elliptic curve cryptography</topic><topic>Elliptic curves</topic><topic>Galois fields</topic><topic>Hardware</topic><topic>Public key cryptography</topic><topic>Security</topic><toplevel>online_resources</toplevel><creatorcontrib>Jian-Yang Zhou</creatorcontrib><creatorcontrib>Xiao-Gang Jiang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jian-Yang Zhou</au><au>Xiao-Gang Jiang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip</atitle><btitle>2007 International Workshop on Anti-Counterfeiting, Security and Identification (ASID)</btitle><stitle>IWASID</stitle><date>2007-04</date><risdate>2007</risdate><spage>292</spage><epage>295</epage><pages>292-295</pages><issn>2163-5048</issn><eisbn>1424410355</eisbn><eisbn>9781424410354</eisbn><abstract>This paper proposes an approach to accelerate elliptic curve cryptography (ECC) algorithm on system-on-programmable-chip (SOPC). We firstly analyzed the software efficiency of field multiplication and field division over GF(2 m ) on Nios II processor. Hardware acceleration for both field multiplication and division is investigated. The designs are integrated and verified with Nios II processor. The experimental results showed that accelerators improve the performance of ECC considerably with the cost of more areas.</abstract><pub>IEEE</pub><doi>10.1109/IWASID.2007.373747</doi><tpages>4</tpages></addata></record> |
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issn | 2163-5048 |
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source | IEEE Xplore All Conference Series |
subjects | Acceleration Arithmetic Costs Digital signatures Elliptic curve cryptography Elliptic curves Galois fields Hardware Public key cryptography Security |
title | Accelerating Elliptic Curve Cryptography on System-on-Programmable-Chip |
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