Stress Hybridization for Multigate Devices Fabricated on Supercritical Strained-SOI (SC-SSOI)

• Published in: IEEE electron device letters 2007-07, Vol.28 (7), p.646-648
• Main Authors: Collaert, N., Rooyackers, R., De Keersgieter, A., Leys, F.E., Cayrefourcq, I., Ghyselen, B., Loo, R., Jurczak, M.
• Format: Article
• Language: English
• Subjects: Applied sciences; Boosters; Capacitive sensors; Contact; Devices; Electron mobility; Electronics; Etching; Exact sciences and technology; Fabrication; FETs; FinFET; Metal oxide semiconductors; mobility improvement; MOS devices; Plugs; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Strain; Stress; Substrates; Tensile strain; Transistors
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2007.900174

In this letter, we investigate the impact of a hybridized strain technology on the performance of FinFET-based multigate field-effect transistors (MUGFETs). The technology combines the use of supercritical strained-silicon-on-insulator (SC-SSOI) and strained contact etch stop layers (CESLs). We will show that SC-SSOI (top plane orientation ) with tensile CESL (tCESL), when used for MUGFET, leads to higher improvement in electron mobility as compared to standard SOI with tCESL. Therefore, the combination of both mobility boosters is very beneficial for n-channel MOS MUGFET. However, the impact of compressive CESL on p-channel MOS (pMOS) performance is strongly reduced and becomes even negative when used on an SC-SSOI substrate. Local strain relief of the SC-SSOI substrate is mandatory in order to achieve good pMOS device performance.