A 2.5-V 4-μW Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with Periodic Bias Current Reduction Technique

This paper proposes a 2.5 V supply, 4 μW low-power delta-sigma modulator for implantable cardiac pacemaker system. Periodic bias current reduction technique is proposed to reduce the power consumption of delta-sigma modulator implemented with switched-capacitor integrator. 2nd order delta-sigma modu...

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Bibliographic Details
Main Authors: Kim, Chae-Ryung, Kang, Yu-Ri, Min, Young-Jae, Kim, Soo-Won
Format: Conference Proceeding
Language:English
Subjects:
Capacitors
Delta modulation
Digital signal processing
Energy consumption
Heart beat
MOSFETs
Pacemakers
Sampling methods
Signal processing
Voltage
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Summary:This paper proposes a 2.5 V supply, 4 μW low-power delta-sigma modulator for implantable cardiac pacemaker system. Periodic bias current reduction technique is proposed to reduce the power consumption of delta-sigma modulator implemented with switched-capacitor integrator. 2nd order delta-sigma modulator exploiting mosfets operating in moderate inversion region is fabricated in a CMOS 0.25 μm process. Measurement results of delta-sigma converter show a power dissipation of 4 μW, and 46 dB of peak SNR in a 128 Hz signal bandwidth.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2007.378457