A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications

• Main Authors: Chiu, Ching-Te, Hsu, Yu-Hao, Kao, Min-Sheng, Tzeng, Hou-Cheng, Du, Ming-Chang, Yang, Ping-Ling, Lu, Ming-Hao, Chen, Fanta, Lin, Hung-Yu, Wu, Jen-Ming, Hsu, Shuo-Hung, Hsu, Yar-Sun
• Format: Conference Proceeding
• Language: English
• Subjects: Analog integrated circuits; Application specific integrated circuits; CMOS technology; Codecs; Digital integrated circuits; High speed integrated circuits; High-speed networks; Switches; Switching circuits; Time division multiplexing
• ISSN: 0271-4302; 2158-1525
• DOI: 10.1109/ISCAS.2007.378623

For the first time, a scalable load balanced Birkhoff-von Neumann TDM switch IC with SERDES interface circuits for high speed networking applications was implemented. Any N×N Birkhoff-von Neumann TDM switch could be constructed recursively from the designed TDM switch IC to achieve switching capacity of hundred gigabits per second or higher. The TDM switch IC contained a digital 8×8 TDM switch core with 8B10B codecs and analog SERDES I/O interfaces. In the I/O interfaces, eight 2.56/3.2Gbps dual-mode 16/20:1 SERDES with CML buffers were developed. The 16/20:1 instead of 8/10:1 serializer and deserializer were used to reduce the required operating frequency in the switch core by half. New half-rate architectures and all static CMOS gates were used in the 16/20:1 serializer and deserializer for the low power consumption. A wide-band CML I/O buffer with our patented PMOS active load scheme was developed. All the implementations were based on the 0.18 μm CMOS technology. Test results showed a 20 Gbps switching capacity for the 8×8 TDM switch IC.