A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme

A low power PRAM using a data-comparison write (DCW) scheme is proposed. The PRAM consumes large write power because large write currents are required during long time. At first, the DCW scheme reads a stored data during write operation. And then, it writes an input data only when the input and stor...

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Bibliographic Details
Main Authors: Yang, Byung-Do, Lee, Jae-Eun, Kim, Jang-Su, Cho, Junghyun, Lee, Seung-Yun, Yu, Byoung-Gon
Format: Conference Proceeding
Language:English
Subjects:
Circuits
CMOS technology
Electric resistance
Energy consumption
Flash memory
Flowcharts
MOS devices
Phase change random access memory
Random access memory
Testing
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Summary:A low power PRAM using a data-comparison write (DCW) scheme is proposed. The PRAM consumes large write power because large write currents are required during long time. At first, the DCW scheme reads a stored data during write operation. And then, it writes an input data only when the input and stored data are different. Therefore, it can reduce the write power consumption to a half. The 1K-bit PRAM test chip with 128×8bits is implemented with a 0.8μm CMOS technology with a 0.5μm GST cell.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2007.377981