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Study of Flow Visualization in Stacked-Chip Scale Packages (S-CSP)

Stacked-chip scale package (S-CSP) is a technology which has high density packaging options. It enables to stack the die in a single package. The S-CSP widely adopt ed in portable multi-media products. However, resin flow through a thin space and wide filling area has become concern. Therefore, this...

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Bibliographic Details
Main Authors: Abdullah, M.K., Abdullah, M.Z., Kamarudin, S., Ariff, M.Z.M., Hussin, P., Antony, J.J., Haroon, H., Saad, M.R., Manikam, M.
Format: Conference Proceeding
Language:English
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Summary:Stacked-chip scale package (S-CSP) is a technology which has high density packaging options. It enables to stack the die in a single package. The S-CSP widely adopt ed in portable multi-media products. However, resin flow through a thin space and wide filling area has become concern. Therefore, this paper presents a study of flow visualization during encapsulation process in S-CSP. The Navier-Stokes equation has been solved by finite different method (FDM). For non-linear flows, the Kawamura and Kuwahara technique has been adopted for the flow analysis in the chip cavity. Pseudo-concentration is based on the volume of fluid (VOF) technique was used to track a melt fronts for each time step. The numerical model has been verified by comparing the prediction with experimental results. The numerical results show good agreement with the experimental results.
DOI:10.1109/SMELEC.2006.380699