Investigation of Substrate Noise Coupling and Isolation Characteristics for a 0.35μM HV CMOS Technology

This paper presents the characterization of substrate noise coupling and the isolation capability of ohmic substrate contacts in a HV CMOS technology. Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been de...

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Main Authors: Pflanzl, W.C., Seebacher, E.
Format: Conference Proceeding
Language:English
Subjects:
CMOS technology
Crosstalk
Damping
Electrical resistance measurement
Fixtures
guard ring
HV CMOS
Isolation
Isolation technology
Radio frequency
Resistors
Semiconductor device modeling
Substrate coupling
Testing
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Seebacher, E.
description This paper presents the characterization of substrate noise coupling and the isolation capability of ohmic substrate contacts in a HV CMOS technology. Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been developed to improve the reliability and accuracy of the measurements. All test cases are fabricated with a 0.35μm HV CMOS technology (Vmax
doi_str_mv 10.1109/MIXDES.2007.4286198
format conference_proceeding
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Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been developed to improve the reliability and accuracy of the measurements. All test cases are fabricated with a 0.35μm HV CMOS technology (Vmax &lt;= 120 V). This process features high resistive native substrate (20 Ohm.cm) together with a 0.5 Ohm.cm pwell. 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Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been developed to improve the reliability and accuracy of the measurements. All test cases are fabricated with a 0.35μm HV CMOS technology (Vmax &lt;= 120 V). This process features high resistive native substrate (20 Ohm.cm) together with a 0.5 Ohm.cm pwell. The modeling section describes the distributed substrate "resistor" and the DUT fixture behavior.</abstract><pub>IEEE</pub><doi>10.1109/MIXDES.2007.4286198</doi></addata></record>
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects CMOS technology
Crosstalk
Damping
Electrical resistance measurement
Fixtures
guard ring
HV CMOS
Isolation
Isolation technology
Radio frequency
Resistors
Semiconductor device modeling
Substrate coupling
Testing
title Investigation of Substrate Noise Coupling and Isolation Characteristics for a 0.35μM HV CMOS Technology
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