Discrete-Time Cellular Neural Networks in FPGA

This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time.

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Bibliographic Details
Main Authors: Martinez-Alvarez, J.J., Toledo-Moreo, F.J., Ferrandez-Vicente, J.M.
Format: Conference Proceeding
Language:English
Subjects:
Cellular neural networks
Computer architecture
Computer networks
Convolution
Field programmable gate arrays
Hospitals
Image edge detection
Neural network hardware
Neurons
Pins
Online Access:Request full text
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Description
Summary:This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time.
DOI:10.1109/FCCM.2007.25