32-bit High Performance Embedded Microprocessor

The Aviation Microelectronic Center of NPU (Northwestern Polytechnical University) has recently completed the development of a 32-bit superscalar RISC microprocessor, called "Longtium" R2. In this paper the architecture of "Longtium" R2 is presented. Firstly, the whole architectu...

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Bibliographic Details
Main Authors: Qu Wenxin, Fan Xiaoya, Hu Ying
Format: Conference Proceeding
Language:English
Subjects:
Access protocols
CMOS process
Decoding
Frequency
Instruments
Longtium
Memory management
Microelectronics
microprocessor
Microprocessors
Reduced instruction set computing
Registers
RISC
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Summary:The Aviation Microelectronic Center of NPU (Northwestern Polytechnical University) has recently completed the development of a 32-bit superscalar RISC microprocessor, called "Longtium" R2. In this paper the architecture of "Longtium" R2 is presented. Firstly, the whole architecture of the "Longtium" R2 microprocessor is presented in section 2. Fig 1 gives the schematic diagram of the architecture of the "Longtium" R2. Then the design and implement are discussed in Section 3. Finally, the conclusions of "Longtium" R3 microprocessor is concluded in section 4. The "longtium"R2 CPU is fabricated in a 0.18μ CMOS process. The die size of the chip is 4.1 mmǒ 5.2 mm and the CPU operating frequency is at least 233MHz.
DOI:10.1109/ICEMI.2007.4350888