Loading…
Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor
We have demonstrated electron transport in enhancement mode in-plane-gate (IPG) quantum dot (QD) transistors. A deep etched trench allows a large positive bias on the IPG, with negligible leakage current. Such enhancement mode operation has made it possible to populate ultra-small QDs with electrons...
Saved in:
| Main Authors: | , , , , , |
|---|---|
| Format: | Conference Proceeding |
| Language: | English |
| Subjects: | |
| Online Access: | Request full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| cited_by | |
|---|---|
| cites | |
| container_end_page | 119 |
| container_issue | |
| container_start_page | 118 |
| container_title | |
| container_volume | 1 |
| creator | SeungHun Son JungIl Lee YongJu Park YunSeop Yu SungWoo Hwang Doyal Ahn |
| description | We have demonstrated electron transport in enhancement mode in-plane-gate (IPG) quantum dot (QD) transistors. A deep etched trench allows a large positive bias on the IPG, with negligible leakage current. Such enhancement mode operation has made it possible to populate ultra-small QDs with electrons. Strong NDR peaks and SET are observed in a wide gate bias window. The position of the NDR peaks systematically moves with the change of gate bias until, and also after the SET regime is reached. The size of the QD is estimated from the SET data, giving quantum energy level spacing consistent with the evolved NDR positions. |
| doi_str_mv | 10.1109/NMDC.2006.4388712 |
| format | conference_proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4388712</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4388712</ieee_id><sourcerecordid>4388712</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-a77d8e56318a75647a7e79586a26af5fc0a81ed901228489d47b200367bee46d3</originalsourceid><addsrcrecordid>eNo1UM1OwzAYC0KTYKMPgLjkBdbl_-dYFTaQBlzGefraphBU0ikJB3h6Om34YtmyLNkI3VJSUkrs6uX5vi4ZIaoU3BhN2QWaU8GEIFJQdYkKq82_JmKG5ses5YQwfYWKlD7JBG7VZF6j3Rqa6FvIfgwYQofbD4jQZhf978kce7yBKq2q4Uj4MECAiKNLY4CQcf4OwQ0-vOMcISSf8hhv0KyHIbnizAv0tn7Y1Y_L7evmqa62S0-1zEvQujNOKk4NaKmEBu20lUYBU9DLviVgqOssoYwZYWwndDNt4Uo3zgnV8QW6O_V659z-EP0XxJ_9-RX-B0OyU3A</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>SeungHun Son ; JungIl Lee ; YongJu Park ; YunSeop Yu ; SungWoo Hwang ; Doyal Ahn</creator><creatorcontrib>SeungHun Son ; JungIl Lee ; YongJu Park ; YunSeop Yu ; SungWoo Hwang ; Doyal Ahn</creatorcontrib><description>We have demonstrated electron transport in enhancement mode in-plane-gate (IPG) quantum dot (QD) transistors. A deep etched trench allows a large positive bias on the IPG, with negligible leakage current. Such enhancement mode operation has made it possible to populate ultra-small QDs with electrons. Strong NDR peaks and SET are observed in a wide gate bias window. The position of the NDR peaks systematically moves with the change of gate bias until, and also after the SET regime is reached. The size of the QD is estimated from the SET data, giving quantum energy level spacing consistent with the evolved NDR positions.</description><identifier>ISBN: 9781424405404</identifier><identifier>ISBN: 1424405408</identifier><identifier>EISBN: 1424405416</identifier><identifier>EISBN: 9781424405411</identifier><identifier>DOI: 10.1109/NMDC.2006.4388712</identifier><identifier>LCCN: 2006930027</identifier><language>eng</language><publisher>IEEE</publisher><subject>Capacitance ; Electrons ; Energy states ; Etching ; Fabrication ; Gallium arsenide ; In-plane-gate ; Quantum computing ; Quantum dots ; resonant tunneling ; Resonant tunneling devices ; SET ; Transistors</subject><ispartof>2006 IEEE Nanotechnology Materials and Devices Conference, 2006, Vol.1, p.118-119</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4388712$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4388712$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>SeungHun Son</creatorcontrib><creatorcontrib>JungIl Lee</creatorcontrib><creatorcontrib>YongJu Park</creatorcontrib><creatorcontrib>YunSeop Yu</creatorcontrib><creatorcontrib>SungWoo Hwang</creatorcontrib><creatorcontrib>Doyal Ahn</creatorcontrib><title>Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor</title><title>2006 IEEE Nanotechnology Materials and Devices Conference</title><addtitle>NMDC</addtitle><description>We have demonstrated electron transport in enhancement mode in-plane-gate (IPG) quantum dot (QD) transistors. A deep etched trench allows a large positive bias on the IPG, with negligible leakage current. Such enhancement mode operation has made it possible to populate ultra-small QDs with electrons. Strong NDR peaks and SET are observed in a wide gate bias window. The position of the NDR peaks systematically moves with the change of gate bias until, and also after the SET regime is reached. The size of the QD is estimated from the SET data, giving quantum energy level spacing consistent with the evolved NDR positions.</description><subject>Capacitance</subject><subject>Electrons</subject><subject>Energy states</subject><subject>Etching</subject><subject>Fabrication</subject><subject>Gallium arsenide</subject><subject>In-plane-gate</subject><subject>Quantum computing</subject><subject>Quantum dots</subject><subject>resonant tunneling</subject><subject>Resonant tunneling devices</subject><subject>SET</subject><subject>Transistors</subject><isbn>9781424405404</isbn><isbn>1424405408</isbn><isbn>1424405416</isbn><isbn>9781424405411</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1UM1OwzAYC0KTYKMPgLjkBdbl_-dYFTaQBlzGefraphBU0ikJB3h6Om34YtmyLNkI3VJSUkrs6uX5vi4ZIaoU3BhN2QWaU8GEIFJQdYkKq82_JmKG5ses5YQwfYWKlD7JBG7VZF6j3Rqa6FvIfgwYQofbD4jQZhf978kce7yBKq2q4Uj4MECAiKNLY4CQcf4OwQ0-vOMcISSf8hhv0KyHIbnizAv0tn7Y1Y_L7evmqa62S0-1zEvQujNOKk4NaKmEBu20lUYBU9DLviVgqOssoYwZYWwndDNt4Uo3zgnV8QW6O_V659z-EP0XxJ_9-RX-B0OyU3A</recordid><startdate>200610</startdate><enddate>200610</enddate><creator>SeungHun Son</creator><creator>JungIl Lee</creator><creator>YongJu Park</creator><creator>YunSeop Yu</creator><creator>SungWoo Hwang</creator><creator>Doyal Ahn</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200610</creationdate><title>Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor</title><author>SeungHun Son ; JungIl Lee ; YongJu Park ; YunSeop Yu ; SungWoo Hwang ; Doyal Ahn</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-a77d8e56318a75647a7e79586a26af5fc0a81ed901228489d47b200367bee46d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Capacitance</topic><topic>Electrons</topic><topic>Energy states</topic><topic>Etching</topic><topic>Fabrication</topic><topic>Gallium arsenide</topic><topic>In-plane-gate</topic><topic>Quantum computing</topic><topic>Quantum dots</topic><topic>resonant tunneling</topic><topic>Resonant tunneling devices</topic><topic>SET</topic><topic>Transistors</topic><toplevel>online_resources</toplevel><creatorcontrib>SeungHun Son</creatorcontrib><creatorcontrib>JungIl Lee</creatorcontrib><creatorcontrib>YongJu Park</creatorcontrib><creatorcontrib>YunSeop Yu</creatorcontrib><creatorcontrib>SungWoo Hwang</creatorcontrib><creatorcontrib>Doyal Ahn</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SeungHun Son</au><au>JungIl Lee</au><au>YongJu Park</au><au>YunSeop Yu</au><au>SungWoo Hwang</au><au>Doyal Ahn</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor</atitle><btitle>2006 IEEE Nanotechnology Materials and Devices Conference</btitle><stitle>NMDC</stitle><date>2006-10</date><risdate>2006</risdate><volume>1</volume><spage>118</spage><epage>119</epage><pages>118-119</pages><isbn>9781424405404</isbn><isbn>1424405408</isbn><eisbn>1424405416</eisbn><eisbn>9781424405411</eisbn><abstract>We have demonstrated electron transport in enhancement mode in-plane-gate (IPG) quantum dot (QD) transistors. A deep etched trench allows a large positive bias on the IPG, with negligible leakage current. Such enhancement mode operation has made it possible to populate ultra-small QDs with electrons. Strong NDR peaks and SET are observed in a wide gate bias window. The position of the NDR peaks systematically moves with the change of gate bias until, and also after the SET regime is reached. The size of the QD is estimated from the SET data, giving quantum energy level spacing consistent with the evolved NDR positions.</abstract><pub>IEEE</pub><doi>10.1109/NMDC.2006.4388712</doi><tpages>2</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 9781424405404 |
| ispartof | 2006 IEEE Nanotechnology Materials and Devices Conference, 2006, Vol.1, p.118-119 |
| issn | |
| language | eng |
| recordid | cdi_ieee_primary_4388712 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Capacitance Electrons Energy states Etching Fabrication Gallium arsenide In-plane-gate Quantum computing Quantum dots resonant tunneling Resonant tunneling devices SET Transistors |
| title | Fabrication and characterization of GaAs/AlGaAs planar resonant tunneling transistor |
| url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T13%3A43%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Fabrication%20and%20characterization%20of%20GaAs/AlGaAs%20planar%20resonant%20tunneling%20transistor&rft.btitle=2006%20IEEE%20Nanotechnology%20Materials%20and%20Devices%20Conference&rft.au=SeungHun%20Son&rft.date=2006-10&rft.volume=1&rft.spage=118&rft.epage=119&rft.pages=118-119&rft.isbn=9781424405404&rft.isbn_list=1424405408&rft_id=info:doi/10.1109/NMDC.2006.4388712&rft.eisbn=1424405416&rft.eisbn_list=9781424405411&rft_dat=%3Cieee_6IE%3E4388712%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-a77d8e56318a75647a7e79586a26af5fc0a81ed901228489d47b200367bee46d3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4388712&rfr_iscdi=true |