A highly integrated quasi-millimeter wave receiver chip using 3D-MMIC technology

A highly integrated quasi-millimeter wave receiver chip that integrates 22 circuits on a 3 x 2.3 mm chip using three-dimensional MMIC (3D-MMIC) technology is presented. The receiver MMIC operates with an LO signal in the 2.7-3.1 GHz range. This LO signal is multiplied in an integrated multiply-by-ei...

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Bibliographic Details
Main Authors: Kaho, T., Yamaguchi, Y., Nagamine, S., Toriyama, Y., Taniguchi, T., Uehara, K.
Format: Conference Proceeding
Language:English
Subjects:
Attenuators
Demodulation
Dynamic range
FETs
Gain
Integrated circuit technology
Inverters
MMICs
Power dissipation
Radio frequency
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Summary:A highly integrated quasi-millimeter wave receiver chip that integrates 22 circuits on a 3 x 2.3 mm chip using three-dimensional MMIC (3D-MMIC) technology is presented. The receiver MMIC operates with an LO signal in the 2.7-3.1 GHz range. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.4 GHz. It can use low-cost VCOs and demodulators in a 2-3 GHz frequency band. The power dissipation of the MMIC is only 450 mW. It also achieved low noise (3.4 dB) and high gain (41 dB) at 26 GHz. Furthermore, it achieved a high dynamic range using two step attenuators in the RF and IF frequency bands with a new built-in inverter using an N-channel depression FET.
DOI:10.1109/EMICC.2007.4412635