MIMO RFIC Transceiver Designs for WLAN Applications

This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2 GHz transceiver RFIC is implemented in a 0.5 mum SiGe technology with 16 mm 2 die size. It consumes 110/130 mA in receive/transmit mode under a 3.3V supply. The receive...

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Bibliographic Details
Main Authors: Dai, F.F., Yin Shi, Jun Yan, Xueqing Hu
Format: Conference Proceeding
Language:English
Subjects:
EVM
Gain
Germanium silicon alloys
Index Terms
linearity
low noise
low power
MIMO
Noise figure
Radiofrequency integrated circuits
RFIC
SiGe
Silicon germanium
Transceivers
Transmitters
Voltage-controlled oscillators
Wireless LAN
WLAN
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Description
Summary:This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2 GHz transceiver RFIC is implemented in a 0.5 mum SiGe technology with 16 mm 2 die size. It consumes 110/130 mA in receive/transmit mode under a 3.3V supply. The receiver path shows a 6.4 dB noise figure and a -20 dBm IIP3 under a maximal 67 dB gain. The transmitter path OIP3 is measured as 29.7 dBm. The LC-tuned VCO has a tuning range from 4.08 GHz to 4.7 GHz and the measured phase noise is -112 dBc/Hz @ 1 MHz offset. Also discussed are design considerations for multiple-input-multiple-output (MIMO) transceiver RFIC implementations.
ISSN:2162-7541
2162-755X
DOI:10.1109/ICASIC.2007.4415638