Dual core capability of a 32-bit DLX microprocessor

We report an implementation of a 32-bit DLX microprocessor capable of operating in a dual core environment. The processor was modified for it to be capable of operating atomic instructions, a requirement in a dual core environment. The dual core environment was simulated using a similar core acting...

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Bibliographic Details
Main Authors: Ancajas, D.M.B., Ballesil, A.P., Hizon, J.R.E., Opelinia, E.A., Reyes, J.A.P., Sepillo, A.G.L., Sumalia, W.A., Tan, W.M.
Format: Conference Proceeding
Language:English
Subjects:
Computer aided instruction
Computer architecture
DLX processor
dual core
Hardware design languages
Microprocessors
multicore
Multicore processing
Multithreading
Pipelines
Process design
Registers
Testing
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Summary:We report an implementation of a 32-bit DLX microprocessor capable of operating in a dual core environment. The processor was modified for it to be capable of operating atomic instructions, a requirement in a dual core environment. The dual core environment was simulated using a similar core acting as a pseudo slave core. The resulting processor can then be interfaced with another instance of the same processor to function as a dual core processor. It can also be interfaced with a DSP co-processor that is compatible with the handshaking protocols of the processor. The resulting implementation yielded a power reduction of 17.9% (due to a more efficient register file) and an area overhead of 23% (due to additional blocks needed for dual core capability) compared to previous DLX implementations of the laboratory.
ISSN:2159-3442
2159-3450
DOI:10.1109/TENCON.2007.4428984