Design of an Algorithmic State Machine Controlled, Field Programmable Gate Array Based 16-bit Microprocessor

A 16-bit microprocessor is designed by top-down design methodology which is controlled by an ASM (algorithm state machine) chart and fitted it into an FPGA (field programmable gate array). The verified simulation result and post route simulation result is shown in this paper. The synthesis result of...

Full description

Saved in:
Bibliographic Details
Main Authors: Muslim, S.M.S., Ahmad, Z.U.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Automata
Clocks
Communication system control
Design methodology
Field programmable gate arrays
Hardware design languages
Logic
Microprocessors
Registers
Citations: Items that cite this one
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A 16-bit microprocessor is designed by top-down design methodology which is controlled by an ASM (algorithm state machine) chart and fitted it into an FPGA (field programmable gate array). The verified simulation result and post route simulation result is shown in this paper. The synthesis result of the design is also described here.
ISSN:2325-0631
DOI:10.1109/ISICIR.2007.4441891