Fully integrated active filter design forultra low frequency application

This paper presents a new active capacitance multiplier circuit, by which it is possible to obtain higher capacitance values. The capacitance multiplier is based on cascaded current multiplier cells (CMC). The proposed circuit is preferred for low power low voltage applications since it is based on...

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Bibliographic Details
Main Authors: Darweesh, H.Y., Khalaf, Y.A., Farag, F.A.
Format: Conference Proceeding
Language:English
Subjects:
Active filters
Analytical models
Capacitance
Capacitors
Circuit simulation
CMOS process
Cutoff frequency
Inverters
Low voltage
Operational amplifiers
Online Access:Request full text
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Summary:This paper presents a new active capacitance multiplier circuit, by which it is possible to obtain higher capacitance values. The capacitance multiplier is based on cascaded current multiplier cells (CMC). The proposed circuit is preferred for low power low voltage applications since it is based on CMOS inverters and op-amps. The capacitance multiplier is employed in the design of a first order LPF with a cutoff frequency as low as 135 Hz using an on-chip capacitor of 1 pF only. The circuit is simulated in CMOS 0.13 mum process. Simulation results show close agreement with the analytical calculations.
DOI:10.1109/DTIS.2007.4449525