Energy Saving Based on CPU Voltage Scaling and Hardware Software Partitioning

We examine the possible energy savings by mapping critical software functions from a microprocessor to configurable logics. A system-on-a-chip containing configurable logic is now commercially available. The configurable logic is typically intended to implement peripherals and co-processors without...

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Bibliographic Details
Main Authors: Chia Hsiang Hsu, Cheng-Juei Yu, Sheng-De Wang
Format: Conference Proceeding
Language:English
Subjects:
Application software
Design optimization
Embedded system
Energy consumption
Hardware design languages
Logic arrays
Logic design
Microprocessors
System-on-a-chip
Voltage
Online Access:Request full text
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Summary:We examine the possible energy savings by mapping critical software functions from a microprocessor to configurable logics. A system-on-a-chip containing configurable logic is now commercially available. The configurable logic is typically intended to implement peripherals and co-processors without increasing chip count. We show that reduced software energy is an extra significant benefit, making such chips even more useful. We identify critical software functions of an application and implement them in the configurable logic such that the application can complete sooner, allowing us to put the system in a low-power state for longer periods, thus reducing energy. We use estimation-based approach for a hypothetical device having a 32-bit MlPS-extension processor plus on-chip configurable logic, yielding energy savings of 40%, increasing to 54% assuming voltage scaling.
DOI:10.1109/PRDC.2007.36