Low power sigma delta modulator with dynamic biasing for audio applications

In this paper, a low power sigma delta modulator with dynamic biasing technique is presented. According to the analysis of the operations of the switched-capacitor integrator, the folded-cascode operational amplifier can be designed with optimized biasing currents in three different phases to reduce...

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Bibliographic Details
Main Authors: Hsin-Liang Chen, Yi-Sheng Lee, Jen-Shiun Chiang
Format: Conference Proceeding
Language:English
Subjects:
CMOS technology
Delta modulation
Delta-sigma modulation
Design optimization
Multi-stage noise shaping
Operational amplifiers
Power amplifiers
Power dissipation
Prototypes
Signal design
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Description
Summary:In this paper, a low power sigma delta modulator with dynamic biasing technique is presented. According to the analysis of the operations of the switched-capacitor integrator, the folded-cascode operational amplifier can be designed with optimized biasing currents in three different phases to reduce power dissipations. The total power saving is 20% of the general one. A prototyping fourth order single-bit MASH 2-2 sigma delta modulator is designed with the technique of dynamic biasing to achieve dynamic range of 95 dB and peak signal-to-noise-and-distortion-ratio of 93 dB. The experimental circuit is designed in 0.35 mum 2P4M CMOS technology. The chip area is 3.11 mm 2 , and the power dissipation is only 5 mW from a supply voltage of 3 V.
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2007.4488561