Automatically-retargetable model-driven tools for embedded code inspection in SoCs

SoC design asks for tools to inspect embedded code and to pinpoint its bugs. Since design exploration may require that the code execute in distinct candidate processors, inspection tools must be retargeted. Besides, the time-to-market pressure makes automatic retargeting mandatory. This can be accom...

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Bibliographic Details
Main Authors: de Schultz, M.R., Mendonca, A.K.I., Carvalho, F.G., Furtado, O.J.V., Santos, L.C.V.
Format: Conference Proceeding
Language:English
Subjects:
Architecture description languages
Assembly
Computer bugs
Debugging
Embedded software
Inspection
Reduced instruction set computing
Software tools
Time to market
VLIW
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Description
Summary:SoC design asks for tools to inspect embedded code and to pinpoint its bugs. Since design exploration may require that the code execute in distinct candidate processors, inspection tools must be retargeted. Besides, the time-to-market pressure makes automatic retargeting mandatory. This can be accomplished through tool generation from a formal model of each target processor, written in some architecture description language (ADL). This work extends a binary utility generator based upon the ArchC ADL by providing a technique for automatically retargeting disassemblers and debuggers. For experimental validation, we relied on the well-known MiBench and Dalton benchmarks. The results obtained from our retargeted tools and those from native tools were compared for distinct RISC and CISC architectures (i8051, MIPS, SPARC and PowerPC).
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2007.4488580