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Three-Dimensional Simulation of Dopant-Fluctuation-Induced Threshold Voltage Dispersion in Nonplanar MOS Structures Targeting Flash EEPROM Transistors

Threshold voltage dispersion due to random discrete dopant fluctuation was simulated in recessed-channel, triple-gate, and saddle MOS structures, targeting future floating-gate memory cell transistor. All nonplanar structures showed improved dispersion characteristics, compared with the planar type...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2008-06, Vol.55 (6), p.1456-1463
Main Authors: KIM, Bomsoo, KWON, Wookhyun, BAEK, Chang-Ki, JIN, Seonghoon, SONG, Yunheub, KIM, Dae M
Format: Article
Language:English
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Summary:Threshold voltage dispersion due to random discrete dopant fluctuation was simulated in recessed-channel, triple-gate, and saddle MOS structures, targeting future floating-gate memory cell transistor. All nonplanar structures showed improved dispersion characteristics, compared with the planar type by proper adjustment of the tunnel oxide structure and channel doping level. The recessed-channel showed a continuous improvement of dispersion with the channel area widening beyond a certain threshold recess depth. In triple-gate structure, a significant reduction in dispersion is shown possible primarily via the superior gate controllability. Among the nonplanar structures, the saddle structure yielded the lowest variation for a fixed target with the choice of moderate device parameters from the other structures.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2008.921988