Verification of Split&Shift techniques for CNN hardware reduction

The so-called split&shift (S&S) methodology has previously been introduced as an effective area saving technique for hardware implementation of cellular non-linear networks. This work provides the first experimental proof of such a methodology through a circuit implementation over an FPGA pl...

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Bibliographic Details
Main Authors: Fernandez-Garcia, N.A., Albo-Canals, Jordi, Brea, Victor M., Riera-Babures, Jordi, Cabello, Diego, Vilasis-Cardona, Xavier
Format: Conference Proceeding
Language:English
Subjects:
Cellular networks
Cellular neural networks
Circuit synthesis
Computer architecture
Computer networks
Emulation
Field programmable gate arrays
Hardware
Network-on-a-chip
Pixel
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Summary:The so-called split&shift (S&S) methodology has previously been introduced as an effective area saving technique for hardware implementation of cellular non-linear networks. This work provides the first experimental proof of such a methodology through a circuit implementation over an FPGA platform. Results of area, processing time and functionality of different instances of the S&S methodology are given.
DOI:10.1109/ECCTD.2007.4529543